1. Field of the Invention
The present invention relates to high density memory devices based on phase change based memory materials, including chalcogenide based materials and on other programmable resistive materials, and methods for manufacturing such devices.
2. Description of Related Art
Phase change based memory materials, like chalcogenide based materials and similar materials, can be caused to change phase between an amorphous state and a crystalline state by application of electrical current at levels suitable for implementation in integrated circuits. The generally amorphous state is characterized by higher electrical resistivity than the generally crystalline state, which can be readily sensed to indicate data. These properties have generated interest in using programmable resistive material to form nonvolatile memory circuits, which can be read and written with random access.
The change from the amorphous to the crystalline state is generally a lower current operation. The change from crystalline to amorphous, referred to as reset herein, is generally a higher current operation, which includes a short high current density pulse to melt or breakdown the crystalline structure, after which the phase change material cools quickly, quenching the molten phase change material and allowing at least a portion of the phase change material to stabilize in the amorphous state.
Because the phase change occurs as a result of heating, a relatively large current is needed in order to heat the phase change material and induce the desired phase change. Issues have arisen in obtaining the necessary current for phase change memory cells having field effect transistor access devices due to the relatively low current drive of field effect transistors.
Bipolar junction transistors can provide larger current drive than field effect transistors, but the integration of bipolar junction transistors with CMOS peripheral circuitry is difficult and may result in highly complex designs and manufacturing processes.
The magnitude of the current can be reduced by reducing the size of the phase change memory element in the cell, so that higher current densities are achieved with small absolute current values through the phase change memory element. However, problems have arisen in manufacturing devices with very small dimensions and with variations in manufacturing processes needed to meet the tight tolerance requirements necessary for large scale high-density memory devices.
It is therefore desirable to provide phase change memory cells with bipolar junction transistor access devices addressing the complexity of design integration with CMOS peripheral circuitry, and compatible with manufacturing of peripheral circuitry on the same integrated circuit. Furthermore, it is desirable to provide methods for manufacturing phase change memory cells addressing the tight tolerance requirements needed for large-scale high-density memory devices.